The present invention relates to a semiconductor device and input and output circuits thereof and, more particularly, to the input and output circuits of a wide-range compatible semiconductor device which is operated at different external power supply voltages Vcc.
In recent years, semiconductor devices such as static RAMs (SRAMs) which are operated on a single chip in a wide range by an external power supply voltage Vcc from a low voltage of, e.g., about 3 V to a relatively high voltage of 5.5 V have been provided. Such a semiconductor device conventionally has an input circuit constituted by a CMOS inverter comprising a p-channel transistor Tr01 having a source to which the external power supply voltage Vcc is applied and a drain connected to the output terminal, and an n-channel transistor Tr02 having a drain connected to the output terminal and a source grounded, as shown in FIG. 5. The gates of the p-channel transistor Tr01 and the n-channel transistor Tr02 are commonly connected to the input terminal.
FIGS. 6A and 6B show conventional output circuits. The output circuit shown in FIG. 6A comprises a p-channel transistor Tr03 having a source to which the external power supply voltage Vcc is applied, a drain connected to the output terminal, and a gate connected to the first input terminal, and an n-channel transistor Tr04 having a drain connected to the output terminal, a source grounded, and a gate connected to the second input terminal (this output circuit arrangement will be referred to as a P-N arrangement hereinafter).
The output circuit shown in FIG. 6B comprises an n-channel transistor Tr05 having a drain to which the external power supply voltage Vcc is applied, a source connected to the output terminal, and a gate connected to the first input terminal, and an n-channel transistor Tr06 having a drain connected to the output terminal, a source grounded, and a gate connected to the second input terminal (this output circuit arrangement will be referred to as an N--N arrangement hereinafter).
However, use of the input and output circuits having the above arrangements for a wide-range compatible semiconductor device poses the following problems.
As the first problem, in the conventional input circuit (FIG. 5), the margin between a specification and a voltage VIH of an input signal IN at which the output signal changes from high level "H" to low level "L", and the margin between a specification value and a voltage VIL of the input signal IN at which the output signal changes from low level "L" to high level "H" can hardly be sufficiently ensured over the wide-range external power supply voltage Vcc.
More specifically, the voltage VIH of the input signal IN capable of switching an output signal OUT from the input circuit from high level "H" to low level "L" depends on the external power supply voltage Vcc and the size ratio of the p-channel transistor Tr01 to n-channel transistor Tr02 constituting the CMOS inverter. This means that assuming that the size ratio of the output transistor Tr01 to Tr02 does not change, as the external power supply voltage Vcc rises, the voltage VIH also becomes high, so the margin to the specification value becomes small.
If the margin becomes small, the device is likely to erroneously operate when the GND level varies due to an electromotive force based on the inductance component of the circuit and interconnection. In other words, when a large current flows from an external circuit connected to the input circuit to GND, the drain potential of the grounded n-channel transistor Tr02 exceeds the actual GND level due to the inductance component. This decreases the margin of the voltage VIH, so the high-voltage operation becomes unstable.
To avoid this problem, the n-channel transistor Tr02 may be made larger than the p-channel transistor Tr01, i.e., the size ratio may be increased to lower the voltage VIH. In this case, the margin to the specification value associated with the voltage VIH in the high-voltage operation can be ensured, although the margin to the specification value of the voltage VIL representing low level "L" in an operation at a low power supply voltage Vcc becomes small. As a result, the device erroneously operate depending on the external power supply voltage Vcc, so the operation becomes unstable.
For the semiconductor device which operates at the wide-range power supply voltage Vcc, a high access speed is required even in the low-voltage operation. As the second problem, the conventional output circuit cannot increase the size of the output transistor because of the influence of noise, so the access speed in the low-voltage operation cannot be increased.
More specifically, to realize a high-speed low-voltage operation in the conventional output circuit, the sizes of the transistors Tr03 and Tr04 with the P-N arrangement shown in FIG. 6A or the sizes of the transistors Tr05 and Tr06 with the N--N arrangement shown in FIG. 6B must be increased. However, when the sizes are increased, a large current flows to the output transistors during output transition in the operation at a high power supply voltage Vcc, so the device is affected by noise. This imposes limitations on the transistor sizes by itself. For this reason, the conventional output circuit cannot simultaneously solve the problem of noise in the high-voltage operation of the wide-range semiconductor device and the problem of access speed in the low-voltage operation.
In the output circuit having the N--N arrangement shown in FIG. 6B, when a voltage of high level is output, i.e., when the n-channel transistor Tr05 to which the external power supply voltage Vcc is applied is ON, a potential difference VT is generated between the drain and the source. As a result, when the output circuit outputs a voltage of high level, the voltage OUT at the output terminal is (Vcc-VT). In the operation at a low external power supply voltage Vcc, the specification value associated with a voltage VOH representing that the output signal OUT is at high level "H" can hardly be satisfied because of the voltage drop corresponding to the potential difference VT in the high-voltage-side output transistor Tr05, resulting in an erroneous operation.